Understanding FET Current Source: Explained with Formulas

An FET Current Source is a specific kind of active circuit which employs a Field Effect Transistor to provide a steady and a constant amount of current to a circuit.

Now you might wonder why it is important for us to have a constant current.

Constant current sources and their opposite, which we call current sinks, are very straightforward methods for creating biasing circuits or voltage references that maintain a consistent amount of current value.

As an example we can achieve currents like 100 microamperes (uA), 1 milliampere (mA), or 20 milliamperes (mA) by using just one FET and one resistor.

We often utilize constant current sources in various applications, such as capacitor charging circuits, where precise timing is crucial.

Additionally these are useful in rechargeable battery charging situations and in linear LED circuits, where we want to drive strings of LEDs at a uniform brightness.

Moreover we can also create resistive voltage references by employing constant current sources.

This is because if we know the resistance value, and also if the current flowing through it remains constant and stable, then we can easily apply Ohm’s law to calculate the voltage drop across that resistance.

To make a constant current source that works well and gives us accurate results, we need to focus on two important things. First we should use low transconductance FETs, which are special types of Field Effect Transistors. Secondly we need to choose precision resistors that will help us turn the current into a precise and stable voltage.

Field Effect Transistors, or FETs are often used to build these current sources. To be precise, we can use Junction-FETs (JFETs) and Metal-Oxide Semiconductor FETs (MOSFETs) for applications where we need low amounts of current.

In its most basic form we can use a JFET just like a voltage controlled resistor.

This means that a small voltage applied to its gate can control how much current flows through its channel or across the drain and source.

By adjusting this small gate voltage we can effectively manage the current, making the JFET a useful component in creating reliable constant current sources.

Adjusting the Junction FET’s Bias

In our most recent tutorial on Junction Field Effect Transistors (JFETs) we examined the intriguing features of these devices, with a specific emphasis on their functioning as depletion-mode devices. We discovered that the N-channel JFET is categorized as a “normally-ON” component. This indicates that it stays active until a negative V_GS is applied to turn it off.

In the same way we found that the P-channel JFET functions as a depletion device that is “normally-ON.” Nevertheless, in this instance we must administer a hard positive gate voltage to switch it to the “OFF” state.

How to Bias an N-channel JFET

We have a diagram depicting the typical arrangement of an N-channel JFET in a standard common source setup.

The main focus is on the functioning of the active region. Essentially the gate-source voltage (V_GS) is simply the gate’s input voltage (V_G) that establishes a reverse bias between the gate and source.

At the same time, V_DS and current are sourced from V_DD, flowing from drain to source. The I_D is the label on the current heading towards the drain.

Currently the V_DS resembles the forward voltage drop of the JFET, and it is determined by the level of drain current (I_D) at various gate voltages (V_GS).

At extremely low V_DS, the JFET’s gate is fully conducting, resulting in maximum I_D, known as I_D(sat) or I_DSS for simplicity’s sake.

Alternatively when V_DS reaches its maximum, the channel closes entirely (referred to as being “pinched off”) causing I_D to decrease to zero. At that moment, the V_DS equals V_DD. The gate cut-off voltage V_GS(off) is the voltage at which the channel closes and stops conducting.

When we set up this common source biasing for an N-channel JFET, it basically decides how the JFET behaves in steady-state mode without any input signal (V_IN).

In this state both V_GS and I_D stay constant, that is what we call the quiescent state.

Now heres the interesting part, in a common-source JFET, the gate-source voltage (V_GS) controls how much current flows through the channel between the drain and source.

This makes the JFET a voltage-controlled device because the input voltage (V_GS) directly controls the channel current (I_D). Because of this we can create a bunch of output characteristic curves by plotting I_D against V_GS for a given specific JFET.

Output Characteristic of N-channel JFET

Using the JFET as a Constant Current Source

So with the n-channel JFET, it is normally in the switched ON condition, but when we make the gate-source voltage V_GS  really negative then it shuts off and stops the current completely. What happens is that the p-type depletion area around the gate gets bigger until it blocks the channel completely. For a p-channel JFET it is the n-type depletion regions that do the blocking.

By setting the gate-source voltage to a specific negative value, we can control how much current flows through the JFET. We can get it to conduct anywhere from zero amps up to its maximum current (I_DSS) which makes it a great option for a constant current source. Check out the circuit below!

Zero-voltage Biasing of a JFET

We notice that the output characteristic curves of the JFET show a relationship between the drain current ID and the gate-source voltage V_GS while the drain-source voltage V_DS is constant.

Now, we also see that here these curves do not change much even when we make significant adjustments to the V_DS. This characteristic can be really helpful when we are trying to establish a fixed operating point for the conductive channel.

Next let us talk about one of the simplest ways to create a constant FET current source. We can do this by shorting the gate terminal of the JFET to its source terminal as shown in the diagram.

In this setup, the JFET’s conductive channel remains open which means that the current flowing through it will be close to its maximum I_DSS value because we are operating the JFET in its saturated current region.

However we should keep in mind that although this constant current configuration is simple, its performance is not very great. The JFET is always in full conduction mode and the I_DSS current value is entirely dependent on the specific type of device we are using.

For instance when we look at the 2N36xx or the 2N43xx n-channel JFET series, we find that they typically handle only a few milliamperes (mA) of current.

On the other hand if we check out the larger n-channel J1xx or PN4xxx series, we see that they can manage several tens of milliamperes. It is also important for us to realize that the I_DSS value, which is the zero gate voltage drain current, can vary quite a bit even among devices that share the same part number.

Manufacturers usually provide these variations in their data sheets, showing us both the minimum and maximum values.

Another thing we should keep in mind is that an FET essentially acts like a voltage-controlled resistor.

The conductive channel within the FET has a resistive value that is in series with the drain and source terminals. We refer to this channel resistance as R_DS.

As we have observed, when V_GS equals zero then the maximum drain-to-source current flows through the device. This means that the JFET’s channel resistance R_DS, must be at its minimum value during this condition and indeed, this is accurate.

Even though we might think that the resistance in the channel of a JFET is zero it is actually not quite that simple.

Instead, the resistance is at an low ohmic value, which is determined by how the FET is manufactured. This resistance can be as high as around 50 Ohms.

Now when we talk about FET conduction, we refer to this channel resistance as R_DS(ON). It reaches its lowest value when the gate-source voltage (V_GS) is set to zero.

This means that if we have a low I_DSS, it will correspond to a high R_DS(ON) value and if we have a high IDSS then we will see a lower R_DS(ON) value.

Now let us consider how we can bias a JFET to work as an FET current source device. We can do this at any current level that is lower than its saturation current, which is I_DSS when V_GS is at zero volts.

When we reach the V_GS(off) cut-off voltage level, the drain current (I_D) will drop to zero because the channel gets closed off. So it is important for us to remember that current will always flow through the channels of the JFET device as long as it operates within its active region, just like we see in the diagrams.

Understanding the Transfer Curve of a JFET

In the case of a P-channel JFET, the V_GS(off) threshold voltage will be a positive value, while the saturation current I_DSS at V_GS of zero volts will remain unchanged compared to an N-channel JFET.

Additionally it should be observed that the transfer curve is non-linear due to the fact that the drain current rises more rapidly as V_GS gets closer to zero volts.

Understanding Negative-voltage Biasing of JFET

We should keep in mind that the JFET is a depletion mode device which means it is typically always “ON.”

For N-channel JFETs, this means we need to apply a negative gate voltage to turn them “OFF,” while for P-channel JFETs we need a positive gate voltage for the same purpose.

If we happen to bias an N-channel JFET with a positive voltage or if we bias a P-channel JFET with a negative voltage, we will actually open the conductive channel even more.

This can force the channel current I_D, to exceed the maximum saturation current I_DSS.

Now if we take a look at the characteristic curves that plot ID against V_GS we can see that by setting V_GS to a certain negative voltage level—let us say -1V, -2V or even -3V—we can create a fixed constant current source using the JFET.

This allows us to achieve whatever current level we need, as long as it falls between zero and I_DSS. This gives us a lot of flexibility in how we use the JFET in our circuits!

When we want to create a more accurate constant current source that also has better regulation, it is actually a good idea for us to bias the JFET at around 10% to 50% of its maximum I_DSS value.

This approach not only improves the accuracy of our current source but also helps reduce I²R power losses that occur through the resistive channel, which in turn minimizes the heating effect.

So what we can see here is that by applying a negative voltage to the gate terminal of an N-channel JFET, or a positive voltage to the gate of a P-channel JFET, we can effectively establish its operating point.

This allows the channel to conduct and pass a specific value of drain current, which we refer to as I_D. For various values of V_GS, we can express the JFET drain current I_D mathematically in a way that helps us understand how it behaves under different conditions.

Formula for Calculating the JFET Drain Current

I_D ≅ I_DSS [1 – (V_GS/V_GS(off))]²

Solving a FET Constant Current Source Problem #1

Looking at the manufacturer’s datasheet for the J107 N-channel switching JFET, we can see that it has an I_DSS value of 35 mA when the gate-source voltage (V_GS) is equal to 0 volts. Additionally the datasheet specifies a maximum V_GS(off) value of -6.0 volts. With these values in mind, let us calculate the drain current (I_D) of the JFET for different gate-source voltage levels, specifically when V_GS = 0 volts, -2 volts, and -5 volts.

With the V_GS = 0V, we have the maximum drain current passing through the conductive channel, which is now full open.

So, I_D = I_DSS = 40 mA

In the condition when we have V_GS = -2 V, then:

I_D ≅ I_DSS [1 – (V_GS/V_GS(off))]²

= 40[1 – (-2/-6)]²

= 0.04(1 – 0.333)²

= 0.04(0.444)

I_D = 17.8 mA

In the situation when we have V_GS = -5 V, then:

I_D ≅ I_DSS [1 – (V_GS/V_GS(off))]²

= 40[1 – (-5/-6)]²

= 0.04(1 – 0.833)²

= 0.04(0.0278)

I_D = 1.1 mA

Transfer Characteristics Curve of JFET J107

So it is clear that the drain current I_D, decreases as the gate-source voltage V_GS, approaches the gate-source cut-off value V_GS(off).

Although we measured the drain current at two distinct locations in this simple instance, a more accurate depiction of the curve might be obtained by using more V_GS values ranging from zero to cut-off.

Using a JFET as a Current Source

So when we think about using a JFET, we can actually make it work as a voltage-controlled constant current source. This happens whenever we reverse bias its gate-source junction.

For an N-channel device, we need to apply a negative gate-source voltage (V_GS) while for a P-channel device, we need to apply a positive V_GS. The tricky part is that the JFET will normally require two separate voltage supplies, one for V_DD and another for V_GS.

But here is where it gets interesting… If we place a resistor between the source and ground (which is at 0 volts), we can create a self-biasing arrangement for V_GS.

This allows the JFET to operate as a constant current source using just the V_DD supply voltage. So we can simplify our setup quite a bit. Let us take a look at the circuit diagram below to see how this works in practice.

When we first take a look at this configuration we might think that it resembles a JFET common drain circuit (source-follower), which we studied in the JFET tutorial. It definitely has some similarities that catch our eye.

However the key difference here is that even though the FET’s gate terminal is still connected directly to ground, meaning V_G equals zero, the source terminal finds itself sitting at a voltage level that is actually above zero volts.

This happens because of the voltage drop across the external source resistor which we refer to as R_S.

So what this means is that as channel current flows through this external source resistor, the gate-to-source voltage of the JFET ends up being less than zero, or in other words, more negative than zero (we can say V_GS is less than zero).

Now let us talk about the role of that external source resistor R_S. It provides a feedback voltage that helps to self-bias the JFET’s gate terminal.

This clever setup keeps the drain current flowing steadily through the channel, no matter what changes might occur in the drain-source voltage. So basically all we really need for this whole arrangement to work is the supply voltage V_DD which provides both the necessary drain current and the biasing we need.

So when we think about how the JFET operates we see that it uses the voltage drop across the source resistor which we call V_RS, to set the gate bias voltage V_GS. This in turn, influences the channel current, just like we discussed earlier.

Basically if we increase the resistive value of R_S, what happens is that the drain current I_D, in the channel will actually decrease. Oppositely, if we reduce that resistance, I_D will go up. Now if we are considering building a JFET constant current source circuit, we might start wondering what would be a good value for this external source resistor R_S??

To get some solid numbers on this, we can check out the manufacturers’ data sheets for a specific N-channel JFET. These sheets will provide us with important values like V_GS(off) and I_DSS.

By knowing these two parameters we can rearrange the JFET equation for the drain current I_D, to figure out what VGS should be for any given drain current value I_D, that falls somewhere between zero and I_DSS.

This means that with just a bit of information from those data sheets and some calculations on our part, we can determine how to set up our circuit to achieve that constant current we are after.

Formula for Calculating the JFET Gate to Source Voltage

I_D ≅ I_DSS [1 – (-V_GS/-V_GS(off))]²

∴ V_GS = -V_GS(off) [1 – √(I_D/I_DSS)]

Once the gate-to-source voltage needed for a specific drain current has been calculated, then we can use the Ohm’s law (R = V/I) to get the necessary source biasing resistor value.

The following equation can be used to calculate JFET Source Resistor:

R_DS = V_GS/I_D (Ω)

Solving an FET Constant Current Source Problem #2

Let us take a look at the J107 N-channel JFET device that we mentioned earlier. This particular device has an I_DSS value of 40mA when V_GS equals zero and it also has a maximum V_GS(off) value of -6.0 volts. So we want to calculate the value of the external source resistor that we need in order to create a constant channel current of 20 mA.

After this we will repeat the calculation for a constant channel current of 5 mA. So we will be working with these two different current levels to see what resistor values we need to use in our circuit to achieve those specific constant channel currents.

Let’s begin by solving the V_GS for an I_D = 20 mA

V_GS = -V_GS(off) [1 – √(I_D/I_DSS)]

V_GS = -6 [1 – √(20/40)] = -6(1 – 0.707) = -1.75 Volts

∴ V_GS = -1.75 V

Now, R_DS = V_GS/I_D

= 1.75/20 = 1.75/0.02

= 87.5 Ω

Next, let’s calculate V_GS when I_D = 5 mA

V_GS = -V_GS(off) [1 – √(I_D/I_DSS)]

V_GS = -6 [1 – √(5/40)] = -6(1 – 0.353) = -1.75 Volts

∴ V_GS = -3.90 V

Next, R_DS = V_GS/I_D

= 3.90/5 = 3.90/0.005

= 780 Ω

So when we know both V_GS(off) and I_DSS, we can actually use the equations we talked about earlier to figure out the source resistance that we need to bias the gate voltage for a specific drain current.

In our simple example we found that this resistance was 87.5 Ω when we wanted a drain current of 20 mA, and it was 780 Ω when we aimed for a drain current of 5 mA.

This means that by adding an external source resistor we can easily adjust the output of our current source to get just the right amount of current flowing.

Now if we wanted to take this a step further, we could swap out those fixed value resistors for a potentiometer. This would allow us to make our JFET constant current source fully adjustable, which can be so useful!

For instance, instead of using two fixed source resistors like in our previous example, we could just use one 1kΩ potentiometer or trimmer.

Not only does this give us the flexibility to adjust the current as needed but it also means that the drain current in our JFET constant current source circuit will stay constant even if we make changes in the V_DS values.

Solving an FET Constant Current Source Problem #3

Here we want to use an N-channel JFET to control the brightness of a 5mm red LED load, and we want to be able to vary that brightness between 8 mA and 15 mA.

To make this happen, we are going to set up a JFET constant current source circuit that will be powered by a 15-volt DC supply.

Now our task is to calculate the JFET’s source resistance which might properly illuminate the LED at both the minimum brightness of 8 mA and the maximum brightness of 16 mA.

We also have some important specifications for our JFET: it has a maximum V_GS(off) value of -4.0 volts, and when V_GS equals zero, its I_DSS is 20 mA.

Once we calculate the necessary source resistance for our JFET, we will also want to draw up a circuit diagram to illustrate how everything fits together.

So, we start by calculating V_GS with I_D = 8 mA

V_GS = -V_GS(off) [1 – √(I_D/I_DSS)]

V_GS = -4 [1 – √(8/20)] = -4(1 – 0.632) = -1.50 Volts

∴ V_GS (8mA) = -1.50 V

Also, R_DS = V_GS/I_D

= 1.50/8 = 1.5/0.008

∴ R_DS (8mA) = 187 Ω

Next, we calculate V_GS with I_D = 16 mA

V_GS = -V_GS(off) [1 – √(I_D/I_DSS)]

V_GS = -4 [1 – √(16/20)] = -4(1 – 0.89) = -0.44 Volts

∴ V_GS (16 mA) = -0.44 V

Also, R_DS = V_GS/I_D

= 0.44/16 = 0.44/0.016

∴ R_DS (15 mA) = 27.5 Ω

If we intend to use an external potentiometer which could be used for varying its resistance from 27.5 Ω and 187 Ω., then we could use a potentiometer having a value of around 200 Ω.

Circuit Diagram for an Adjustable JFET Constant Current Source

So if we decide to use a potentiometer or a trimmer instead of a fixed value for our source resistance, which we call RS, it would give us the ability to vary or fine-tune the current that is flowing through the JFET’s conductive channel.

This flexibility can be super helpful when we want to adjust the brightness of our LED or any other load.

However to make sure that we have good current regulation through the FET device, and to achieve a more stable current flow, it would actually be a smart move to limit the maximum channel current flowing through the LED (which is 15mA in our example) to somewhere between 10% and 50% of the JFET’s IDSS value. This way we can ensure that everything operates smoothly without any unexpected issues.

Now let us understand how we can create constant current sources using MOSFETs. This method allows us to get greater channel currents and it also helps to achieve better current regulation overall.

Moreover, unlike JFETs which can get only as normally-on depletion mode devices, MOSFETs come in both depletion-mode (which are normally-on) and enhancement-mode (which are normally-off) variations.

They can be also procured in both P-channel and N-channel types, which gives us a much wider range of options when it comes to setting up our current sources.

Conclusions

In this lesson on the FET Constant Current Source, we learned that field effect transistors, due to their unique channel resistance characteristics, may be extremely beneficial for giving a constant current to a load. 

This capability opens up a whole new world of applications in electronic circuits where we need to provide a fixed current to whatever load is connected.

Now it is important to note that we can build constant current circuits not just with depletion mode FETs but we can also use bipolar junction transistors or BJTs or even combine these two types of devices together.

It is worth remembering that although the JFET is a voltage-controlled device, the bipolar junction transistor operates as a current-controlled device.

One of the main characteristics of a Junction Field Effect Transistor or JFET is that, since it operates as a depletion device, its conductive channel is always open by default. This means that in order to turn it “OFF” we need to apply a gate-to-source voltage, which we refer to as V_GS.

For an N-channel JFET, the V_GS(off) voltage that we need can vary quite a bit. It starts at 0 volts which allows for full conduction of the channel and goes down to some negative value, usually several volts, which is necessary to completely turn the JFET OFF, effectively closing the channel.

By biasing the gate terminal of the JFET at some fixed value that falls between zero and this V_GS(off), we can control the width of the depletion layer in the channel. This adjustment allows us to set its resistive value so that it passes a fixed and constant amount of current.

Now if we look at a P-channel JFET, we find that its V_GS(off) value behaves a bit differently. For this type of JFET, the V_GS(off) also starts at 0 volts for full channel conduction but then moves up to some positive value of several volts when we are using a specific V_DS value.

When we analyze the regulation and tolerance of the constant current for a specific JFET device, we find that it is closely related to the amount of drain current I_D, that is flowing through the channel. The interesting thing here is that the lower the drain current passing through a particular device, the better the regulation tends to be.

To enhance the regulation and overall performance of the device, we should bias the JFET at somewhere between about 10% to 50% of its maximum I_DSS value.

We can do this by connecting an external resistance between the source and gate terminals.

Now if we put a gate-to-source feedback resistor, like we have shown in our diagrams, this resistor provides the necessary self-biasing for the JFET.

This self-biasing allows it to operate as a constant current source at any current level that is well below its saturation current I_DSS.

The external source resistance R_S can either be a fixed resistive value or we can make it variable by using a potentiometer.

References:

Mosfet constant current

MOSFET Current Sources